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The New Economics of Semiconductor Manufacturing – Part 1

The New Economics of Semiconductor Manufacturing is a new-ish article that you can find at the IEEE Spectrum site which delves into the application of Lean methodology into the wafer fab (fabrication facility) of as yet unnamed integrated device manufacturer. The authors of this article are Clayton M. Christensen, Steven King, Matt Verlinden, and Woodward Yang. Since, I work in semiconductor scheduling and optimization, the experience recounted in this article is of direct interest to me simply because most of these problems have been solved using the "system" I’ve been a part of deploying. Nevertheless for some/many of you who have never walked into a wafer fab, the following is a good snapshot of what you’d normally see:

Walk into a multibillion-dollar chip-fabrication plant-a fab-and you may very well get the impression that the industry is headed for a spectacular meltdown. One of the first things you’ll see is a bay the size of two basketball courts packed with equipment for projecting a lithographic design onto wafers. Nearby, you’ll find a towering bin, called a stocker, filled with wafers waiting to be processed by this equipment. The wafers are worth from US $10 million to $100 million-all of it idle inventory.

Why? To amortize the $5 billion investment in a fab over a five-year schedule costs more than $3 million a day. Conventional wisdom holds that to generate that much money you must keep all the equipment running all the time, even if that means creating large unused queues of wafers. What’s more, to justify that scale, you have to produce a semiconductor product in volumes of at least 5000 to 10 000 wafers per month.

So you can well imagine the wheels spinning in the heads of accountants and finance folk that are dead set on amortizing (all pun intended, "mort" is from the french verb to kill or die) the capital spent in purchasing these very expensive machinery. But that is very much the truth of the matter in my experience where even operations folk blindly follow the utilization mantra in some form or the other. But you should also know that there’s something that is called Moore’s Law

Moore’s law describes an important trend in the history of computer hardware: that the number of transistors that can be inexpensively placed on an integrated circuit is increasing exponentially, doubling approximately every two years. The observation was first made by Intel co-founder Gordon E. Moore in a 1965 paper. The trend has continued for more than half a century and is not expected to stop for another decade at least and perhaps much longer.

While Moore’s law makes this important observation about the rate at which transistors can be "inexpensively" placed on an integrated circuit, it has become some sort of mantra in itself,

Although Moore’s law was initially made in the form of an observation and forecast, the more widely it became accepted, the more it served as a goal for an entire industry. This drove both marketing and engineering departments of semiconductor manufacturers to focus enormous energy aiming for the specified increase in processing power that it was presumed one or more of their competitors would soon actually attain. In this regard, it can be viewed as a self-fulfilling prophecy.

The direct implication of this widely adopted mantra is that the inventory referred to above which is sitting in stockers and in WIP (work in process inventory) any given day is at high risk of obsolescence simply because of development and innovation going on both inside and outside the firm. But also,

More than anything else, Moore’s Law has been responsible for the gigantic costs. It takes huge amounts of capital to support the incessant cycles of investment and obsolescence that keep Moore’s Law on the march. That rapid cycling explains why a company’s shining jewels can turn into white elephants in just five years.

A contrary view of Moore’s Law by Ilkka Tuomi is available here : The Lives and Death of Moore’s Law (and verily to my delight) that follows a strictly empirical approach of analyzing and validating Moore’s law in its multiple variants. I strongly encourage reading this article as it will shed a clarifying eye on the nature of abstractions that we make in this technological march forward.

So regardless of whether you buy the argument that Moore’s law is a self fulfilling prophecy which creates several layers of obsolescence within short periods of time or that development and innovation within the semiconductor industry has largely been the result of interactions between other industries and itself, the facts of the industry do not change in the sense that equipment is costly to acquire, requires significant investments of time, effort and money to use effectively and is a victim/creator of boom-bust cycles. The central claim of the authors is as follows:

In early 2007, we had the opportunity not merely to emulate Toyota’s system but to apply its principles to a logic fab belonging to an integrated device manufacturer (IDM). As consultants, we are not at liberty to divulge the company’s name; however, it’s safe to say that the company is highly competitive-that is, it has survived and prospered by pursuing Moore’s Law, always remaining at the forefront in technology and operational excellence. But Moore’s Law was turning this jewel of a fab into a white elephant while the equipment was still relatively new.

In just seven months, the organization was able to reduce the manufacturing cost per wafer by 12 percent and the cycle time-the time it takes to turn a blank silicon wafer into a finished wafer, full of logic chips-by 67 percent. It did all this without investing in new equipment or changing the product design or technical specifications. And this short experiment has exposed only the tip of the iceberg. We believe that these early results point to what we call the new economics of semiconductor manufacturing and that this will have a profound and lasting effect on the industry and create new opportunities for growth.

In the next part of the series, I will go into the claims made here, essential principles of TPS/Lean that have been used and compare and contrast with my own experiences.

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About me

I am Chris Jacob Abraham and I live, work and blog from Newburgh, New York. I work for IBM as a Senior consultant in the Fab PowerOps group that works around the issue of detailed Fab (semiconductor fab) level scheduling on a continual basis. My erstwhile company ILOG was recently acquired by IBM and I've joined the Industry Solutions Group there.

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